Posted by: Kerri McConnell
The idea for this paper came from a conversation our CEO, Roy Sherrill, had with several customers and industry folks regarding the decreasing endurance of flash memory. Some smaller lithography parts have program/erase cycles counted in the hundreds. What techniques can be used to make sure writes (and hence erases) are held to a minimum while still providing the level of performance and reliability that embedded devices require? He had some theories, but wanted proof.
In an earlier blog post titled "Managed NAND Performance: It's All About Use Case," we referred to an article measuring SD media, specifically sequential write performance. Speed was measured using a camera to shoot continuous pictures. Photographers and other users of SD media have another concern - reliability.
Posted by: Thom Denholm
eMMC has seen strong adoption and become the storage of choice for consumer devices such as smartphones, e-readers and tablets. These small devices all run on battery power and require high-density storage with low power consumption -- at a low cost.
Posted by: Roy Sherrill